Add Infrastructure for SHGEMV

Add SBGEMV and SHGEMV routines to RISC-V

fix unspecified array size in DGEMV clobber list on POWER10

Change all aligned moves in x86_64 MIN/MAX to unaligned

Rework definitions of ?FLOAT16_GEMM_GEMV_FORWARD to avoid undefined behavior

Tie in SHGEMV for RISC-V.

When building on a non-x86 host the Makefile definitions for HAVE_* are
never printed which leads to build failures and/or silently targeting the
wrong microarchitecture. The issue is that INTEL_AMD is defined if the
host architecture is x86, but for cross builds we need to test whether
the target is x86. Test for that using the macro FORCE_INTEL.

Remove C11 requirement for tests and ensure qemu is installed in the RISCV64 CI job

…build

fix misnaming of NVHPC as NVC in ARM64 compiler option selection

Fix cross compilation for x86 targets from non-x86

Use linker response files with CMake on all Apple hardware

Split VORTEXM4 from VORTEX target and fix SGEMM_DIRECT support for SME-capable targets

Update the Changelog for version 0.3.31